1. Field of the Invention
The present invention generally relates to the analog-to-digital conversion technology (hereinafter referred to as “A-D conversion”) and it particularly relates to an analog-to-digital converter (hereinafter referred to as “A-D converter”) having a plurality of comparators connected in parallel wherein the comparator compares the level of reference voltage with the level of analog signal.
2. Description of the Related Art
In an A-D converter, a comparator is used to compare the level of reference voltage with the level of analog signal. When the quantization width of an A-D converter, namely the range of voltage expressed by 1 bit is small, the offset of the comparator will become an issue. Reference (1) listed in the following Related Art List discloses a comparator and an offset correcting converter provided with an offset correcting operation separately from an usual A-D conversion operation.
In Reference (1), a switch, by which to input the nominal voltage instead of the analog input to be A-D converted at the time when the offset correction is activated, is provided for the second input of the comparator, for each comparator.
Related Art List
(1) Japanese Patent Application Laid-Open No. Hei08-279752.
In a case where the switch is provided for each comparator as in Reference (1), the capacitance and resistance of the switch is added in a path of analog signals. Hence, the frequency characteristics deteriorate and the frequency deterioration may cause the distortion of waveforms, thus eventually impairing the reliability of A-D conversion.